Serial data transmission and processing of audio signals using FPGAS

Ordoñez León, Verónica Gabriela

Please use this identifier to cite or link to this item: http://dspace.utpl.edu.ec/jspui/handle/123456789/2179

Title:	Serial data transmission and processing of audio signals using FPGAS
Authors:	Ordoñez León, Verónica Gabriela
metadata.dc.contributor.advisor:	Parra, Jorge
Keywords:	Señales - Video
metadata.dc.date.available:	2012-02-16
Issue Date:	2008
Description:	Nowadays, FPGA’s (field-programmable gate array) are gaining importance in both, the commercial and research area. Since this technology is far more affordable than custom-manufactured ASICs, smaller companies and universities can take advantage of the capabilities of large-scale integration (1). Thus, implementations on hardware might have interesting and cheaper applications for both, educational and research purposes. FPGA’s are an extremely valuable tool in teaching VLSI (Very-large-scale integration) design, and working on a real hardware environment can motivated the students. Programming a configurable device like a FPGA has the benefit of exposing students to a sophisticated hardware and software when designing interactive programs and circuits (1). Moreover, diverse and innovative applications can be achieved, since boards like (the one is used in this implementation) the XUP Virtex II Pro, allow to plug in or connect a microphone, speaker, mouse, serial cable, screen, etc. Audio Processing and Serial Transmission are two applications of the FPGA’s field. The present implementation joins the two mentioned applications to construct a system that is able to record voice and playback it. These two actions are controlled by HyperTerminal, which requires setting up a serial connection. A design tool, the ISE 9.2i, is used in order to describe pieces of hardware on VHDL. Since this system is constructed by modules and components, they can be used separately to achieve similar or different applications that required more complexity. The first chapter is a brief introduction of the general approach to the architecture and the components of the system. Chapter II is about the protocols, interfaces and hardware to be described to achieve a properly serial communication between the computer and the FPGA. Chapters III and IV show the procedure to open an audio path using the audio codec of the board; and the implementation of a finite state machine that makes defined tasks to be performed orderly, respectively. Finally, some potential applications, an illustrative description of the implementation and results are shown.
metadata.dc.identifier.other:	621x84
URI:	http://dspace.utpl.edu.ec/handle/123456789/2179
metadata.dc.rights:	openAccess
metadata.dc.type:	bachelorThesis
Appears in Collections:	Ingeniero en Electrónica y Telecomunicaciones

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